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 VL-FS-MDLS16165D-02 REV. A (MDLS16165D-LV-G) OCT/2002 PAGE 2 OF 13
DOCUMENT DOCUMENT REVISION FROM TO A
REVISION HISTORY 1: DATE DESCRIPTION CHANGED BY PHILIP CHENG CHECKED BY TOM LEE
2002.10.11
First Release. (Based on Test Specification : VL-TS-MDLS16165D-XX, REV. B, 2002.05.23).
VL-FS-MDLS16165D-02 REV. A (MDLS16165D-LV-G) OCT/2002 PAGE 3 OF 13
CONTENTS
Page No. 1. 2. 3. 4. 4.1 4.2 5. 5.1 5.2 5.3 6. 7. GENERAL DESCRIPTION MECHANICAL SPECIFICATIONS INTERFACE SIGNALS ABSOLUTE MAXIMUM RATINGS ELECTRICAL MAXIMUM RATINGS (Ta=25C) ENVIRONMENTAL CONDITION ELECTRICAL SPECIFICATIONS TYPICAL ELECTRICAL CHARACTERISTICS TIMING SPECIFICATIONS TIMING DIAGRAM OF VDD AGAINST V0 CHARACTER GENERATOR ROM (KS0066U-10B) INSTRUCTION TABLE 4 4 6 7 7 7 8 8 9 11 12 13
VL-FS-MDLS16165D-02 REV. A (MDLS16165D-LV-G) OCT/2002 PAGE 4 OF 13
VARITRONIX LIMITED
Specification of LCD Module Type Item No.: MDLS16165D-02
1. General Description * * * * 16 characters(5 x 8 dots) x 1 line STN Positive Yellow Reflective LCD Character Module. Viewing Angle: 6 O'clock direction. Driving duty: 1/16 Duty, 1/5 bias. `SAMSUNG' KS0066UP-10BCC(Die form) LCD Controller & Driver or equivalent.
2.
Mechanical Specifications The mechanical detail is shown in Fig. 1 and summarized in Table 1 below. Table 1
Parameter Outline dimensions Effective viewing area Display format Character size Character spacing Character pitch Dot size Dot spacing Dot pitch Weight
Specifications 68.0(W) x 34.0(H) x 9.0 MAX.(D) 52.0(W) x 11.0(H) 16 characters x 1 line 2.65(W) x 5.50(H) (5 x 8 dots) 0.45(W) 3.10(W) 0.45(W) x 0.60(H) 0.10(W) x 0.10(H) 0.55(W) x 0.70(H) TBD
Unit mm mm mm mm mm mm mm mm grams
VL-FS-MDLS16165D-02 REV. A (MDLS16165D-LV-G) OCT/2002 PAGE 5 OF 13
Figure 1: Module Specification
VL-FS-MDLS16165D-02 REV. A (MDLS16165D-LV-G) OCT/2002 PAGE 6 OF 13
3.
Interface signals Table 2
Pin No. 1 2 3 4
Symbol VSS VDD V0 RS
5
R/W
6 7 8 9 10 11 12 13 14 15 or A 16 or K
E DB0 DB1 DB2 DB3 DB4 DB5 DB6 DB7 LED(+) LED(-)
Description Ground (0V). Power supply for logic (+5.0V). Power supply for LCD driver. Register Select Input: "High' for Data register (for read and write). "Low" for Instruction register (for write), Busy flag, address counter (for read). Read/Write signal: `High' for Read mode. `Low' for Write mode. Enable. Start signal for data read /write. Data input/output (LSB) Data input/output Data input/output Data input/output Data input/output Data input/output Data input/output Data input/output (MSB) Anode of LED Backlight. Cathode of LED Backlight.
VL-FS-MDLS16165D-02 REV. A (MDLS16165D-LV-G) OCT/2002 PAGE 7 OF 13
4. 4.1
Absolute Maximum Ratings Electrical Maximum Ratings (Ta = 25 C) Table 3
Parameter Symbol Min. Max. Unit Power Supply voltage (Logic) VDD-VSS -0.3 +7.0 V Power Supply voltage VLCD -0.3 +15.0 V (LCD drive) =VDD-V0 Input voltage Vin -0.3 VDD+0.3 V Note: The modules may be destroyed if they are used beyond the absolute maximum ratings. All voltage values are referenced to VSS = 0V.
4.2
Environmental Condition Table 4 Operating Storage Temperature Temperature (Topr) (Tstg) Min. Max. Min. Max. 0C +50C -10C +60C 95% max. RH for Ta 40C < 95% RH for Ta > 40C Frequency: 10 55 Hz Amplitude: 0.75 mm Duration: 20 cycles in each direction. Pulse duration : 11 ms Peak acceleration: 981 m/s2 = 100g Number of shocks : 3 shocks in 3 mutually perpendicular axes.
Item
Remark
Ambient Temperature Humidity Vibration (IEC 68-2-6) cells must be mounted on a suitable connector Shock (IEC 68-2-27) Half-sine pulse shape
Dry no condensation 3 directions
3 directions
VL-FS-MDLS16165D-02 REV. A (MDLS16165D-LV-G) OCT/2002 PAGE 8 OF 13
5. Electrical Specifications 5.1 Typical Electrical Characteristics At Ta = 25 C, VDD = 5V5%, VSS=0V. Table 5 Parameter Supply voltage (Logic) Supply voltage (LCD) Input signal voltage for E,DB0-DB7,R/W,RS. Supply Current (Logic & LCD) Symbol VDD -VSS VLCD =VDD -V0 VIH VIL IDD Conditions VDD = 5V, Note (1) "H" level " L" level Character mode, VDD = 5V Checker board mode, VDD = 5V Character mode, VDD=5V, Note (1) Checker board mode, VDD=5V, Note (1) Min. 4.75 4.3 2.2 -0.3 Typ. 5.0 4.5 0.7 1.0 0.2 0.2 Max. 5.25 4.7 VDD 0.6 1.0 1.5 0.3 0.3 Unit V V V V mA mA mA mA
Supply Current (LCD)
I0
Note (1) : There is tolerance in optimum LCD driving voltage during production and it will be within the specified range.
VL-FS-MDLS16165D-02 REV. A (MDLS16165D-LV-G) OCT/2002 PAGE 9 OF 13
5.2
Timing Specifications At Ta = 0 C To +50 C, VDD = +5V5%, VSS = 0V. Refer to Fig. 2, the bus timing diagram for write mode. Table 6 Parameter E Cycle Time E Rise/Fall Time E Pulse Width(high, low) R/W and RS Setup Time R/W and RS Hold Time Data Set-up Time Data Hold Time Symbol tc tR,tF tW tSU1 tH1 tSU2 tH2 Min. 500 230 40 10 80 10 Max. 20 Unit ns ns ns ns ns ns ns
Refer to Fig. 3, the bus timing diagram for read mode. Table 7 Parameter E Cycle Time E Rise/Fall Time E Pulse Width(high, low) R/W and RS Setup Time R/W and RS Hold Time Data Output Delay Time Data Hold Time Symbol tc tR,tF tW tSU tH tD tDH Min. 500 230 40 10 5 Max. 20 120 Unit ns ns ns ns ns ns ns
VL-FS-MDLS16165D-02 REV. A (MDLS16165D-LV-G) OCT/2002 PAGE 10 OF 13
Figure 2: Write Mode Timing Diagram
Figure 3: Read Mode Timing Diagram
VL-FS-MDLS16165D-02 REV. A (MDLS16165D-LV-G) OCT/2002 PAGE 11 OF 13
5.3 Timing Diagram of VDD Against V0. Power on sequence shall meet the requirement of Figure 4, the timing diagram of VDD against V0.
VDD
95%
LOGIC SUPPLY VOLTAGE 0V 50ms(typical)
V0
0V LCD SUPPLY VOLTAGE
Figure 4: Timing Diagram of VDD Against V0.
VL-FS-MDLS16165D-02 REV. A (MDLS16165D-LV-G) OCT/2002 PAGE 12 OF 13
6. Character Generator ROM (KS0066U-10B)
VL-FS-MDLS16165D-02 REV. A (MDLS16165D-LV-G) OCT/2002 PAGE 13 OF 13
7. Instruction Table
"Varitronix Limited reserves the right to change this specification." FAX:(852) 2343-9555. URL:http://www.varitronix.com - END -


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